SoC/Analog 测试系统 Model 3650-CX

  • 50/100MHz; 200Mhz (MUX) Clock Rate
  • 50/100Mbps; 200 Mbps (MUX) Data Rate
  • Up to 256 digital I/O pins
  • 16/32 (option) MW vector memory
  • 16/32 (option) MW pattern instruction memory
  • Per-pin timing/PPMU/frequency measurement
  • Up to 4-32 16-bit ADDA channels option
  • SW configurable scan chains in 1024M depth or up to 32 scan chains/board
  • ALPG option for memory test
  • Up to 16 high-voltage pins
  • 16 high-performance DPS channels
  • Overall timing accuracy < ±550ps
  • 8~32-CH/board for VI45 analog option
  • 2~8-CH/board for PVI100 analog option
  • Microsoft Windows® XP OS
  • C++ and GUI programming interface
  • CRISP, full suite of intuitive software tools
  • Air-cooled, All-in-one design and space-saving footprint
  • Cable mount/Direct mount


  • MCU/MCU + Embedded Memory
  • NAND Flash Controller
  • PC I/O
  • Switch ICs
  • Smart Power Management Devices
  • Mixed Signal, Digital and Analog ICs
  • Consumer ICs
  • Engineering, Wafer Sort and Final Test
  • Power ICs
  • LED Driver ICs

 Chroma 3650-CX brings you the low cost and high performance test solution

3650-CX adopts the all-in-one design to provide a compact size ATE with very low cost, high accuracy and high throughput for customers to save the cost and raise the profit. With the versatile test capabilities and powerful software tools, 3650-CX is designed for MCU, NAND flash controllers, the peripheral devices of PC, switch devices, LED driver ICs, power ICs and consumer SoC devices.

 CRISP, the powerful system software for 3650-CX

The 3650-CX features powerful suite of software tool s us ing Chroma Integrated Sof tware Platform, CRISP. It not only provides the rapid test developing functions, CRISP also covers all needs for test debugging, production and data analysis. Base on the Microsoft Windows XP® operation system and C++ programming language, CRISP provides powerful, easy-to-use, intuitive and fast-runtime GUI tools for users. The CRISP includes test plan debugger, pattern editor, waveform tool, scope tool, pin margin, Shmoo, wafer map, histogram, STDF tool, datalog and etc.

 All-in-one design and compact size to save the floor space

With the air-cooled and zero footprint testerin- a-test-head design, 3650-CX delivers high throughput in a highly integrated package for minimum floor space. With an optional manipulator, 3650-CX can be used in both package and wafer sort test.


The 3650-CX provides multiple drivers for communications with handler and prober by GPIB and TTL interface. The supported handlers or probers include SEIKO-EPSON, SHIBASOKU, MULTITEST, ASECO, DAYMARC, TEL, TSK and OPUS II, and so forth.



SoC/Aanlog 测试系统